URL https://opencores.org/ocsvn/sdr_ctrl/sdr_ctrl/trunk

Subversion Repositories sdr_ctrl

[/] [sdr_ctrl/] [trunk/] [verif] - Rev 56

Rev	Log message	Author	Age	Path
22	Pad sdram clock added	dinesha	4498d 06h	/sdr_ctrl/trunk/verif
21	Clean up	dinesha	4498d 06h	/sdr_ctrl/trunk/verif
20	8 Bit SDARM support is added	dinesha	4500d 00h	/sdr_ctrl/trunk/verif
19	8 Bit SDRAM Support added	dinesha	4500d 01h	/sdr_ctrl/trunk/verif
18	8 Bit SDRAM Support is added	dinesha	4500d 01h	/sdr_ctrl/trunk/verif
17	micron 8 bit memory models are added into svn	dinesha	4500d 01h	/sdr_ctrl/trunk/verif
14	Unnecessary device config are removed	dinesha	4503d 02h	/sdr_ctrl/trunk/verif
12	Column Bits are made programmable	dinesha	4503d 02h	/sdr_ctrl/trunk/verif
10	Waveform files are added into SVN	dinesha	4506d 03h	/sdr_ctrl/trunk/verif
8	test bench files are added into SVN	dinesha	4507d 02h	/sdr_ctrl/trunk/verif