URL https://opencores.org/ocsvn/sdr_ctrl/sdr_ctrl/trunk

Subversion Repositories sdr_ctrl

[/] [sdr_ctrl] - Rev 37

Rev	Log message	Author	Age	Path
17	micron 8 bit memory models are added into svn	dinesha	4491d 17h	/sdr_ctrl
16	8 Bit SDRAM Support is added	dinesha	4491d 17h	/sdr_ctrl
15	Port cleanup	dinesha	4494d 17h	/sdr_ctrl
14	Unnecessary device config are removed	dinesha	4494d 18h	/sdr_ctrl
13	column bit are made progrmmable	dinesha	4494d 18h	/sdr_ctrl
12	Column Bits are made programmable	dinesha	4494d 18h	/sdr_ctrl
11	SDRAM Specification document added into SVN	dinesha	4497d 19h	/sdr_ctrl
10	Waveform files are added into SVN	dinesha	4497d 19h	/sdr_ctrl
9	SDR Bus width parameter passing issue across the models are fixed	dinesha	4498d 18h	/sdr_ctrl
8	test bench files are added into SVN	dinesha	4498d 19h	/sdr_ctrl