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Rev Log message Author Age Path
23 Pad sdram clock added and read path register w.r.t pad sdram clock dinesha 4494d 20h /
22 Pad sdram clock added dinesha 4494d 20h /
21 Clean up dinesha 4494d 20h /
20 8 Bit SDARM support is added dinesha 4496d 14h /
19 8 Bit SDRAM Support added dinesha 4496d 14h /
18 8 Bit SDRAM Support is added dinesha 4496d 14h /
17 micron 8 bit memory models are added into svn dinesha 4496d 15h /
16 8 Bit SDRAM Support is added dinesha 4496d 15h /
15 Port cleanup dinesha 4499d 15h /
14 Unnecessary device config are removed dinesha 4499d 15h /
13 column bit are made progrmmable dinesha 4499d 16h /
12 Column Bits are made programmable dinesha 4499d 16h /
11 SDRAM Specification document added into SVN dinesha 4502d 17h /
10 Waveform files are added into SVN dinesha 4502d 17h /
9 SDR Bus width parameter passing issue across the models are fixed dinesha 4503d 16h /
8 test bench files are added into SVN dinesha 4503d 16h /
7 SDRAM Memory Models are added into SVN dinesha 4503d 16h /
6 Golden Log files are added into SVN dinesha 4503d 17h /
5 Run files are updated into SVN dinesha 4503d 17h /
4 Sdram controller RTL bug fixes done for 16bit SDR Mode dinesha 4504d 14h /

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