URL https://opencores.org/ocsvn/simple_spi/simple_spi/trunk

Subversion Repositories simple_spi

[/] [simple_spi/] [trunk/] [rtl/] [verilog/] - Rev 10

Rev	Log message	Author	Age	Path
10	Added the directory structure for simple spi	root	5542d 09h	/simple_spi/trunk/rtl/verilog/
8	Fixed SCK_O generation bug. This resulted in a major rewrite of the serial interface engine.	rherveille	7382d 02h	/simple_spi/trunk/rtl/verilog/
7	Fixed some timing bugs.	rherveille	7593d 06h	/simple_spi/trunk/rtl/verilog/
6	Updated clkcnt size and decoding due to new SPR bit assignments.	rherveille	7797d 01h	/simple_spi/trunk/rtl/verilog/
5	Changed SPR bits coding.	rherveille	7799d 05h	/simple_spi/trunk/rtl/verilog/
2	Initial release	rherveille	7815d 02h	/simple_spi/trunk/rtl/verilog/