URL https://opencores.org/ocsvn/simple_spi/simple_spi/trunk

Subversion Repositories simple_spi

[/] [simple_spi/] [trunk/] [rtl/] [verilog/] [simple_spi_top.v] - Rev 10

Rev	Log message	Author	Age	Path
10	Added the directory structure for simple spi	root	5522d 20h	/simple_spi/trunk/rtl/verilog/simple_spi_top.v
8	Fixed SCK_O generation bug. This resulted in a major rewrite of the serial interface engine.	rherveille	7362d 13h	/simple_spi/trunk/rtl/verilog/simple_spi_top.v
7	Fixed some timing bugs.	rherveille	7573d 17h	/simple_spi/trunk/rtl/verilog/simple_spi_top.v
6	Updated clkcnt size and decoding due to new SPR bit assignments.	rherveille	7777d 12h	/simple_spi/trunk/rtl/verilog/simple_spi_top.v
5	Changed SPR bits coding.	rherveille	7779d 16h	/simple_spi/trunk/rtl/verilog/simple_spi_top.v
2	Initial release	rherveille	7795d 13h	/simple_spi/trunk/rtl/verilog/simple_spi_top.v