URL https://opencores.org/ocsvn/spi_slave/spi_slave/trunk

Subversion Repositories spi_slave

[/] - Rev 34

Rev	Log message	Author	Age	Path
34	changed test TX-CRC Block from end of block to start change crc value eb99fa90 to e4ea78bf	dkoethe	5846d 04h	/
33	moved TX CRC Value from end of packet to the start.	dkoethe	5846d 04h	/
32	added: > lib opb_spi_slave_v1_00_a PCK_CRC32_D32.vhd vhdl > lib opb_spi_slave_v1_00_a crc_gen.vhd vhdl > lib opb_spi_slave_v1_00_a opb_spi_slave vhdl	dkoethe	5846d 05h	/
31	added PARAMETER C_CRC_EN = true, DT = BOOLEAN	dkoethe	5846d 05h	/
30	added doxygen comments	dkoethe	5846d 05h	/
29	Changed TX CRC-Calculation	dkoethe	5846d 05h	/
28	Changed TX CRC-Insertion	dkoethe	5846d 05h	/
27	added test for CRC	dkoethe	5898d 04h	/
26	Initial Release	dkoethe	5898d 04h	/
25	added > vcom -93 ../../../../../rtl/vhdl/PCK_CRC8_D8.vhd > vcom -93 ../../../../../rtl/vhdl/PCK_CRC32_D32.vhd > vcom -93 ../../../../../rtl/vhdl/crc_gen.vhd > vcom -93 ../../../../../rtl/vhdl/crc_core.vhd	dkoethe	5898d 04h	/
24	added Register C_ADR_RX_CRC. C_ADR_TX_CRC	dkoethe	5898d 04h	/
23	added logic for CRC-Generation	dkoethe	5898d 04h	/
22	added signal opb_m_last_block for CRC	dkoethe	5898d 04h	/
21	added constant C_ADR_RX_CRC,C_ADR_TX_CRC, added constant C_OPB_CTL_REG_CRC_EN, C_OPB_CTL_REG_CRC_CLR	dkoethe	5898d 04h	/
20	Initial Release	dkoethe	5898d 04h	/
19	Version 1.2 removed delays for simulation	dkoethe	6003d 03h	/
18	Version 1.1 Bugfix added syncronisation registers opb_fifo_flg_int_r[0,1] to prevent metastability	dkoethe	6003d 03h	/
17	no message	dkoethe	6010d 00h	/
16	no message	dkoethe	6010d 03h	/
15	increased C_NUM_FLG to 16, C_NUM_INT to 11 for opb_abort_flg	dkoethe	6010d 03h	/