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Subversion Repositories srdydrdy_lib

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Rev Log message Author Age Path
31 Added bridge2 files ghutchis 4381d 02h /
30 Added llmanager component ghutchis 4381d 02h /
29 Updated arbitration ghutchis 4696d 01h /
28 Added ports & fixed signal propagation ghutchis 4801d 01h /
27 Added environment to bpdrop ghutchis 4801d 18h /
26 Added backpressure drop module ghutchis 4801d 19h /
25 Added sd_sync component for cross-clock synchronization ghutchis 4907d 16h /
24 Added CRC32 checker to environment & RTL ghutchis 5024d 17h /
23 Imported Ethernet Tri-Mode MAC for use in examples ghutchis 5194d 16h /
22 Created separate module-level environments for fifo_b
and scoreboard. Added some documentation on the
example bridge, including a PDF preso giving a basic
introduction to ethernet.
ghutchis 5220d 20h /
21 Changed rrslow to rrmux, updated descriptions, changed
bridge mux to fast arb
ghutchis 5221d 23h /
20 Added fast arb mode ghutchis 5222d 00h /
19 Fixed several minor bugs in scoreboard, adjusted usage width in sd_fifo_b,
and updated component documentation.
ghutchis 5222d 12h /
18 Added scoreboard and scoreboard testbench ghutchis 5222d 16h /
17 Added component descriptions ghutchis 5223d 01h /
16 Changed fifo head/tail to have separate usage counters for producer and consumer
side.

Fixed bug in port_ring_tap where it jumped to non-existent state.

Changed default dump mode for icarus to lxt.
ghutchis 5223d 13h /
15 Fixed FIB lookup multicast -- multicast packets were being
repeatedly sent from lookup
ghutchis 5223d 17h /
14 - Modified large FIFO to remove "full" signal and store only N-1 words
- changed small FIFO to use memory instance instead of registers
- changed sequence generator to enable more complex tests
- changed sd_mirror to use combinatorial assign output
ghutchis 5225d 11h /
13 Fixed FIFO Full condition for large fifo, added separate
tests to example bridge
ghutchis 5228d 22h /
12 Added absolute priority arbitration to ring to avoid
having two ring taps transmit at same time
ghutchis 5229d 21h /
11 Updated bridge example to fix a number of small bugs.
First packet now exits bridge from all ports.
ghutchis 5230d 20h /
10 Fixed "locked" variable in rrslow ghutchis 5231d 01h /
9 Added rx_gigmac, additional debug work on concentrator & fib ghutchis 5231d 01h /
8 Added compiling version of bridge example ghutchis 5232d 13h /
7 Added rrslow ghutchis 5234d 16h /
6 Modified "B" output buffer for full-rate operation ghutchis 5237d 01h /
5 Added new component for port ring ghutchis 5237d 17h /
4 Added example directory with basic bridge ghutchis 5238d 12h /
3 Added small/synchronizer FIFO, along with minimal testbench ghutchis 5239d 11h /
2 Initial commit of directory structure and basic components ghutchis 5243d 20h /

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