URL https://opencores.org/ocsvn/srdydrdy_lib/srdydrdy_lib/trunk

Subversion Repositories srdydrdy_lib

[/] [srdydrdy_lib/] [trunk/] [env/] [verilog/] [common/] [sd_seq_check.v] - Rev 22

Rev	Log message	Author	Age	Path
22	Created separate module-level environments for fifo_b and scoreboard. Added some documentation on the example bridge, including a PDF preso giving a basic introduction to ethernet.	ghutchis	5231d 12h	/srdydrdy_lib/trunk/env/verilog/common/sd_seq_check.v
3	Added small/synchronizer FIFO, along with minimal testbench	ghutchis	5250d 03h	/sd_seq_check.v