URL https://opencores.org/ocsvn/srdydrdy_lib/srdydrdy_lib/trunk

Subversion Repositories srdydrdy_lib

[/] [srdydrdy_lib/] [trunk/] [rtl/] [verilog/] [forks/] [sd_rrmux.v] - Rev 29

Rev	Log message	Author	Age	Path
29	Updated arbitration	ghutchis	4706d 10h	/srdydrdy_lib/trunk/rtl/verilog/forks/sd_rrmux.v
24	Added CRC32 checker to environment & RTL	ghutchis	5035d 01h	/srdydrdy_lib/trunk/rtl/verilog/forks/sd_rrmux.v
21	Changed rrslow to rrmux, updated descriptions, changed bridge mux to fast arb	ghutchis	5232d 07h	/srdydrdy_lib/trunk/rtl/verilog/forks/sd_rrmux.v
20	Added fast arb mode	ghutchis	5232d 08h	/srdydrdy_lib/trunk/rtl/verilog/forks/sd_rrslow.v
18	Added scoreboard and scoreboard testbench	ghutchis	5233d 00h	/srdydrdy_lib/trunk/rtl/verilog/forks/sd_rrslow.v
10	Fixed "locked" variable in rrslow	ghutchis	5241d 09h	/srdydrdy_lib/trunk/rtl/verilog/forks/sd_rrslow.v
7	Added rrslow	ghutchis	5245d 01h	/srdydrdy_lib/trunk/rtl/verilog/forks/sd_rrslow.v