URL https://opencores.org/ocsvn/t400/t400/trunk

Subversion Repositories t400

[/] [t400/] [trunk/] [bench/] [vhdl/] - Rev 179

Rev	Log message	Author	Age	Path
179	- remove unsupported CVS tags - propset for Id	arniml	5527d 07h	/t400/trunk/bench/vhdl/
176	New directory structure.	root	5549d 17h	/t400/trunk/bench/vhdl/
144	initial check-in	arniml	6552d 05h	/t400/trunk/bench/vhdl/
139	initial check-in	arniml	6552d 13h	/t400/trunk/bench/vhdl/
125	initial check-in	arniml	6553d 08h	/t400/trunk/bench/vhdl/
117	initial check-in	arniml	6558d 06h	/t400/trunk/bench/vhdl/
105	remove obsolete en_clk_s	arniml	6558d 08h	/t400/trunk/bench/vhdl/
104	fix typo	arniml	6558d 12h	/t400/trunk/bench/vhdl/
97	lower nibble is OD to prevent contention with testbench	arniml	6566d 04h	/t400/trunk/bench/vhdl/
91	don't generate interrupt when in interrupt routine around 0x100	arniml	6566d 11h	/t400/trunk/bench/vhdl/
78	provide SA at L port	arniml	6567d 00h	/t400/trunk/bench/vhdl/
73	use 'after' instead of wait for signal delay should resolve problems with delta cycle arrival times	arniml	6567d 04h	/t400/trunk/bench/vhdl/
67	explicitly select clock divider 4	arniml	6567d 08h	/t400/trunk/bench/vhdl/
66	explicitly select clock divider 8	arniml	6567d 08h	/t400/trunk/bench/vhdl/
65	add global signals for testbench instrumentation	arniml	6567d 08h	/t400/trunk/bench/vhdl/
64	add fail reporting for port d	arniml	6567d 08h	/t400/trunk/bench/vhdl/
63	initial check-in	arniml	6567d 08h	/t400/trunk/bench/vhdl/
60	connect cko_i to bit 2 of IN bus	arniml	6571d 02h	/t400/trunk/bench/vhdl/
58	consider IN port	arniml	6572d 02h	/t400/trunk/bench/vhdl/
57	consider CKO and IN port	arniml	6572d 02h	/t400/trunk/bench/vhdl/