URL https://opencores.org/ocsvn/t51/t51/trunk

Subversion Repositories t51

[/] [t51/] [trunk/] - Rev 51

Rev	Log message	Author	Age	Path
51	New directory structure.	root	5541d 10h	/t51/trunk/
50	initial version	andreas	6240d 22h	/trunk/
49	some improvements	andreas	6404d 08h	/trunk/
48	* empty log message *	andreas	6572d 21h	/trunk/
47	updated t8052 core	andreas	6573d 04h	/trunk/
46	some updates	andreas	6573d 04h	/trunk/
45	* empty log message *	andreas	6573d 04h	/trunk/
44	some updates and bugfixes	andreas	6573d 04h	/trunk/
43	bugfix for interrupts at stalled instructions	andreas	6655d 22h	/trunk/
42	* empty log message *	andreas	6674d 20h	/trunk/
41	some updates	andreas	6674d 21h	/trunk/
40	* empty log message *	andreas	6674d 21h	/trunk/
39	some updates for T8032	andreas	6674d 21h	/trunk/
38	some updates	andreas	6684d 04h	/trunk/
37	some updates	andreas	6684d 04h	/trunk/
36	some updates	andreas	6684d 08h	/trunk/
35	some updates	andreas	6684d 08h	/trunk/
34	bugfix for mode 0	andreas	6693d 00h	/trunk/
33	bugfix for JBC instruction	andreas	6705d 05h	/trunk/
32	bugfix for two subsequent movx instructions	andreas	6742d 00h	/trunk/
31	update	andreas	6827d 23h	/trunk/
30	Made some bugfixes	andreas	6829d 02h	/trunk/
29	Removed UNISIM library	jesus	7839d 06h	/trunk/
28	Added -n option and component declaration	jesus	7867d 03h	/trunk/
27	Added Leonardo .ucf generation	jesus	7867d 03h	/trunk/
26	Updated for ISE 5.1	jesus	7873d 23h	/trunk/
25	Fixed typo	jesus	7883d 15h	/trunk/
24	Fixed for ISE 5.1	jesus	7883d 15h	/trunk/
23	Xilinx SSRAM, initial release	jesus	7893d 17h	/trunk/
22	Removed write through	jesus	7921d 14h	/trunk/