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URL https://opencores.org/ocsvn/t80/t80/trunk

Subversion Repositories t80

[/] [t80/] [trunk/] - Rev 47

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Rev Log message Author Age Path
47 New directory structure. root 5527d 07h /t80/trunk/
46 Made some bugfixes andreas 6815d 00h /trunk/
45 Fixed loopback break generation jesus 7816d 02h /trunk/
44 Added some missing features and fixed baud rate generator jesus 7816d 15h /trunk/
43 *** empty log message *** jesus 7825d 03h /trunk/
42 Fixed bus req/ack cycle jesus 7825d 03h /trunk/
41 Removed UNISIM library jesus 7825d 03h /trunk/
40 Cleanup jesus 7825d 03h /trunk/
39 Added -n option and component declaration jesus 7853d 01h /trunk/
38 Added Leonardo .ucf generation jesus 7853d 01h /trunk/
37 Changed to single register file jesus 7853d 03h /trunk/
36 Added component declaration jesus 7853d 04h /trunk/
35 Release 0242 jesus 7859d 15h /trunk/
34 Updated for ISE 5.1 jesus 7859d 21h /trunk/
33 Fixed typo jesus 7869d 13h /trunk/
32 Fixed for ISE 5.1 jesus 7869d 13h /trunk/
31 Fixed generic name error jesus 7872d 14h /trunk/
30 Changed to xilinx specific RAM jesus 7878d 14h /trunk/
29 Fixed (IX/IY+d) timing and added all GB op-codes jesus 7878d 14h /trunk/
28 Adapted for zxgate jesus 7879d 14h /trunk/
27 Xilinx SSRAM, initial release jesus 7879d 14h /trunk/
26 Fixed instruction timing for POP and DJNZ jesus 7893d 06h /trunk/
25 IX/IY timing and ADC/SBC fix jesus 7894d 16h /trunk/
24 no message jesus 7900d 13h /trunk/
23 Fixed T2Write jesus 7900d 13h /trunk/
22 Added 8080 top level jesus 7900d 13h /trunk/
21 no message jesus 7905d 12h /trunk/
20 Updated for new T80s generic jesus 7905d 12h /trunk/
19 Initial version jesus 7905d 12h /trunk/
18 Added T2Write generic jesus 7905d 19h /trunk/

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