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URL https://opencores.org/ocsvn/tv80/tv80/trunk

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[/] [tv80/] [trunk/] [env/] - Rev 115

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Rev Log message Author Age Path
115 Modified for working on 32-bit environment ghutchis 4652d 09h /tv80/trunk/env/
90 Fixed syntax errors in core preventing Verilator from compiling.
Added new capability to register generator to make registers which
latch on an external event. Removed spurious copyright notice.		 ghutchis 5278d 01h /tv80/trunk/env/
89 RTL and environment fixes for nmi bug ghutchis 5298d 04h /tv80/trunk/env/
84 New directory structure. root 5538d 14h /tv80/trunk/env/
75 Modified environment I/O so multicycle wr_n signals are only seen as
a single write.		 ghutchis 6875d 06h /trunk/env/
69 Added UART instance in testbench, and added UART to compile list. ghutchis 6999d 01h /trunk/env/
66 Modified top level testbench to reflect changes in simple_gmii block ghutchis 7007d 02h /trunk/env/
56 Updated env for simple_gmii with async clk ghutchis 7081d 23h /trunk/env/
53 Added environment hooks for using and testing the GMII interface ghutchis 7083d 23h /trunk/env/
42 Added decode of OUT (##),A instruction
Removed dump-by-default and added DUMP_START define		 ghutchis 7121d 18h /trunk/env/
41 Added random-read value port ghutchis 7123d 22h /trunk/env/
37 Added new I/O registers for testing block I/O ghutchis 7125d 15h /trunk/env/
36 Removed default instruction decode ghutchis 7125d 15h /trunk/env/
31 1) Added environment support for Z80 op decode in log file.
2) Fixed env support for interrupt generation and clearing		 ghutchis 7142d 02h /trunk/env/
28 Added code to initialize RAM to all 00 at environment start-up time. ghutchis 7145d 02h /trunk/env/
2 Initial commit ghutchis 7297d 06h /trunk/env/

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