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[/] [uart2bus/] [trunk/] [doc/] - Rev 12

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12 Updated Verilog implementation to sync with VHDL to include internal bus request/grant mechanism. motilito 4052d 12h /uart2bus/trunk/doc/
8 Updated core description document to include Lattice device synthesis results. motilito 4368d 17h /uart2bus/trunk/doc/
4 Corrected some problems in the binary mode protocol test bench.
Updated documentation.
motilito 4746d 03h /uart2bus/trunk/doc/
2 Uploaded the initial project version. motilito 4792d 10h /uart2bus/trunk/doc/

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