URL https://opencores.org/ocsvn/uart2bus/uart2bus/trunk

Subversion Repositories uart2bus

[/] [uart2bus/] [trunk/] [vhdl/] - Rev 14

Rev	Log message	Author	Age	Path
13	VHDL version: - Add GHDL support for automated testbenches. - Migrate to ieee.numeric_std. - Reorganize a little bit the test benches.	smuller	2994d 02h	/uart2bus/trunk/vhdl/
11	VHDL version: - Add a request-grant mechanism. This will permit to use it on a shared bus without any bus contention. - Improve the test benches. - Automate the launching of test benches. - Fix a bug in 'uartRx.vhd'. - Reorganize a little bit the directory structure.	smuller	4451d 21h	/uart2bus/trunk/vhdl/
10	VHDL version: corrected problems in the UART modules that prevented it to operate with 1 stop bit with high data rate.	smuller	4543d 19h	/uart2bus/trunk/vhdl/
6	Commit VHDL description source with basic test benches	smuller	5037d 05h	/uart2bus/trunk/vhdl/
5	Add structure for VHDL (verilog similar tree).	smuller	5048d 22h	/uart2bus/trunk/vhdl/