OpenCores
URL https://opencores.org/ocsvn/uart_fpga_slow_control_migrated/uart_fpga_slow_control_migrated/trunk

Subversion Repositories uart_fpga_slow_control_migrated

[/] [uart_fpga_slow_control/] - Rev 34

Rev

Filtering Options

Clear current filter

Rev Log message Author Age Path
14 ADDED: backup of the project description aborga 4646d 21h /uart_fpga_slow_control/
13 UDATED: simple documentation aborga 4646d 23h /uart_fpga_slow_control/
12 ADDED: original documentation of the UART_16550 core by LeFevre aborga 4646d 23h /uart_fpga_slow_control/
11 ADDED: Block diagram of the UART_FPGA_slow_control_main_diagram
1) pdf format
2) Microsoft visio source file (sorry...)
aborga 4646d 23h /uart_fpga_slow_control/
10 MODIFIED: added further description and examples aborga 4647d 05h /uart_fpga_slow_control/
9 ADDED: HowToSVN.txt to handle repositories with windows Tortoise SVN aborga 4647d 06h /uart_fpga_slow_control/
8 ADDED: some more documentation

1) screenshot of a full read and write sequence with questasim
2) example hex commands to be sent via RealTerm
aborga 4647d 06h /uart_fpga_slow_control/
7 MODIFIED: line 359 baudrate set aborga 4647d 07h /uart_fpga_slow_control/
6 CREATED: how to change baudrate text file aborga 4647d 07h /uart_fpga_slow_control/
5 aborga 4647d 07h /uart_fpga_slow_control/

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.