URL https://opencores.org/ocsvn/versatile_library/versatile_library/trunk

Subversion Repositories versatile_library

[/] [versatile_library/] [trunk/] - Rev 28

Rev	Log message	Author	Age	Path
28	added sync simplex FIFO	unneback	4888d 02h	/versatile_library/trunk/
27	added sync simplex FIFO	unneback	4888d 02h	/versatile_library/trunk/
26	typo in sync FIFO, added cnt_lfsr_ce_q cnt_lfsr_ce_clear_q	unneback	4888d 04h	/versatile_library/trunk/
25	added sync FIFO	unneback	4888d 17h	/versatile_library/trunk/
24	added vl_dff_ce_set	unneback	4890d 01h	/versatile_library/trunk/
23	fixed port map error in async fifo 1r1w	unneback	4890d 15h	/versatile_library/trunk/
22	added binary counters	unneback	4890d 21h	/versatile_library/trunk/
21	reg -> wire in and or mux in logic	unneback	4891d 17h	/versatile_library/trunk/
20	naming convention vl_	unneback	4893d 04h	/versatile_library/trunk/
19	naming convention vl_	unneback	4893d 04h	/versatile_library/trunk/
18	naming convention vl_	unneback	4893d 04h	/versatile_library/trunk/
17		unneback	4956d 17h	/versatile_library/trunk/
16	converting utility for ROM	unneback	4957d 05h	/versatile_library/trunk/
15	added delay line	unneback	4963d 01h	/versatile_library/trunk/
14	reg -> wire for various signals	unneback	4963d 06h	/versatile_library/trunk/
13	cosmetic update	unneback	4963d 08h	/versatile_library/trunk/
12	added wishbone comliant modules	unneback	4964d 04h	/versatile_library/trunk/
11	async fifo simplex	unneback	4964d 19h	/versatile_library/trunk/
10	added dff_ce_clear	unneback	4966d 17h	/versatile_library/trunk/
9	added dff_ce_clear	unneback	4966d 17h	/versatile_library/trunk/