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[/] [versatile_library/] [trunk/] - Rev 30

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Rev Log message Author Age Path
30 updated counter for level1 and level2 function unneback 3927d 03h /versatile_library/trunk/
29 updated counter for level1 and level2 function unneback 3927d 03h /versatile_library/trunk/
28 added sync simplex FIFO unneback 3928d 04h /versatile_library/trunk/
27 added sync simplex FIFO unneback 3928d 04h /versatile_library/trunk/
26 typo in sync FIFO, added cnt_lfsr_ce_q cnt_lfsr_ce_clear_q unneback 3928d 06h /versatile_library/trunk/
25 added sync FIFO unneback 3928d 19h /versatile_library/trunk/
24 added vl_dff_ce_set unneback 3930d 03h /versatile_library/trunk/
23 fixed port map error in async fifo 1r1w unneback 3930d 18h /versatile_library/trunk/
22 added binary counters unneback 3930d 23h /versatile_library/trunk/
21 reg -> wire in and or mux in logic unneback 3931d 19h /versatile_library/trunk/
20 naming convention vl_ unneback 3933d 06h /versatile_library/trunk/
19 naming convention vl_ unneback 3933d 06h /versatile_library/trunk/
18 naming convention vl_ unneback 3933d 06h /versatile_library/trunk/
17 unneback 3996d 19h /versatile_library/trunk/
16 converting utility for ROM unneback 3997d 07h /versatile_library/trunk/
15 added delay line unneback 4003d 03h /versatile_library/trunk/
14 reg -> wire for various signals unneback 4003d 08h /versatile_library/trunk/
13 cosmetic update unneback 4003d 10h /versatile_library/trunk/
12 added wishbone comliant modules unneback 4004d 06h /versatile_library/trunk/
11 async fifo simplex unneback 4004d 21h /versatile_library/trunk/

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