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[/] [versatile_library/] [trunk/] [rtl/] [verilog/] - Rev 43

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Rev Log message Author Age Path
43 added logic for parity generation and check unneback 4826d 20h /versatile_library/trunk/rtl/verilog
42 updated mux_andor unneback 4830d 19h /versatile_library/trunk/rtl/verilog
41 typo in registers.v unneback 4830d 21h /versatile_library/trunk/rtl/verilog
40 new build environment with custom.v added as a result file unneback 4830d 21h /versatile_library/trunk/rtl/verilog
39 added simple port prio based wb arbiter unneback 4831d 18h /versatile_library/trunk/rtl/verilog
38 updated andor mux unneback 4831d 18h /versatile_library/trunk/rtl/verilog
37 corrected polynom with length 20 unneback 4837d 15h /versatile_library/trunk/rtl/verilog
36 added generic andor_mux unneback 4838d 23h /versatile_library/trunk/rtl/verilog
35 added vl_mux2_andor and vl_mux3_andor localparam unneback 4839d 10h /versatile_library/trunk/rtl/verilog
34 added vl_mux2_andor and vl_mux3_andor unneback 4839d 10h /versatile_library/trunk/rtl/verilog
33 updated wb3wb3_bridge unneback 4852d 12h /versatile_library/trunk/rtl/verilog
32 added vl_pll for ALTERA (cycloneIII) unneback 4859d 22h /versatile_library/trunk/rtl/verilog
31 sync FIFO updated unneback 4879d 18h /versatile_library/trunk/rtl/verilog
30 updated counter for level1 and level2 function unneback 4879d 18h /versatile_library/trunk/rtl/verilog
29 updated counter for level1 and level2 function unneback 4879d 18h /versatile_library/trunk/rtl/verilog
28 added sync simplex FIFO unneback 4880d 19h /versatile_library/trunk/rtl/verilog
27 added sync simplex FIFO unneback 4880d 19h /versatile_library/trunk/rtl/verilog
26 typo in sync FIFO, added cnt_lfsr_ce_q cnt_lfsr_ce_clear_q unneback 4880d 21h /versatile_library/trunk/rtl/verilog
25 added sync FIFO unneback 4881d 10h /versatile_library/trunk/rtl/verilog
24 added vl_dff_ce_set unneback 4882d 18h /versatile_library/trunk/rtl/verilog

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