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[/] [versatile_library/] [trunk/] [rtl/] [verilog/] - Rev 49

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Rev Log message Author Age Path
28 added sync simplex FIFO unneback 4903d 11h /versatile_library/trunk/rtl/verilog
27 added sync simplex FIFO unneback 4903d 11h /versatile_library/trunk/rtl/verilog
26 typo in sync FIFO, added cnt_lfsr_ce_q cnt_lfsr_ce_clear_q unneback 4903d 12h /versatile_library/trunk/rtl/verilog
25 added sync FIFO unneback 4904d 02h /versatile_library/trunk/rtl/verilog
24 added vl_dff_ce_set unneback 4905d 10h /versatile_library/trunk/rtl/verilog
23 fixed port map error in async fifo 1r1w unneback 4906d 00h /versatile_library/trunk/rtl/verilog
22 added binary counters unneback 4906d 05h /versatile_library/trunk/rtl/verilog
21 reg -> wire in and or mux in logic unneback 4907d 02h /versatile_library/trunk/rtl/verilog
18 naming convention vl_ unneback 4908d 13h /versatile_library/trunk/rtl/verilog
17 unneback 4972d 02h /versatile_library/trunk/rtl/verilog

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