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[/] [versatile_library/] [trunk/] [rtl/] [verilog/] [clk_and_reset.v] - Rev 42

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Rev Log message Author Age Path
40 new build environment with custom.v added as a result file unneback 3584d 23h /versatile_library/trunk/rtl/verilog/clk_and_reset.v
33 updated wb3wb3_bridge unneback 3606d 14h /versatile_library/trunk/rtl/verilog/clk_and_reset.v
32 added vl_pll for ALTERA (cycloneIII) unneback 3614d 00h /versatile_library/trunk/rtl/verilog/clk_and_reset.v
21 reg -> wire in and or mux in logic unneback 3638d 12h /versatile_library/trunk/rtl/verilog/clk_and_reset.v
18 naming convention vl_ unneback 3639d 23h /versatile_library/trunk/rtl/verilog/clk_and_reset.v
17 unneback 3703d 12h /versatile_library/trunk/rtl/verilog/clk_and_reset.v
4 added counters unneback 3730d 18h /versatile_library/trunk/rtl/verilog/clk_and_reset.v
3 various updates
counter added
unneback 3733d 13h /versatile_library/trunk/rtl/verilog/clk_and_reset.v

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