OpenCores
URL https://opencores.org/ocsvn/versatile_library/versatile_library/trunk

Subversion Repositories versatile_library

[/] [versatile_library/] [trunk/] [rtl/] [verilog/] [registers.v] - Rev 24

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
24 added vl_dff_ce_set unneback 4003d 18h /versatile_library/trunk/rtl/verilog/registers.v
18 naming convention vl_ unneback 4006d 21h /versatile_library/trunk/rtl/verilog/registers.v
17 unneback 4070d 11h /versatile_library/trunk/rtl/verilog/registers.v
15 added delay line unneback 4076d 18h /versatile_library/trunk/rtl/verilog/registers.v
10 added dff_ce_clear unneback 4080d 11h /versatile_library/trunk/rtl/verilog/registers.v
8 added dff_ce_clear unneback 4080d 11h /versatile_library/trunk/rtl/verilog/registers.v
5 memories added unneback 4093d 13h /versatile_library/trunk/rtl/verilog/registers.v
3 various updates
counter added
unneback 4100d 12h /versatile_library/trunk/rtl/verilog/registers.v

powered by: WebSVN 2.1.0

© copyright 1999-2021 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.