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[/] [versatile_library/] [trunk/] [rtl/] [verilog/] [versatile_library.v] - Rev 114

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Rev Log message Author Age Path
90 updated wishbone byte enable mem unneback 4860d 00h /versatile_library/trunk/rtl/verilog/versatile_library.v
86 wb ram unneback 4860d 19h /versatile_library/trunk/rtl/verilog/versatile_library.v
85 wb ram unneback 4860d 20h /versatile_library/trunk/rtl/verilog/versatile_library.v
83 new BE_RAM unneback 4861d 07h /versatile_library/trunk/rtl/verilog/versatile_library.v
82 read changed to comb unneback 4862d 05h /versatile_library/trunk/rtl/verilog/versatile_library.v
81 read changed to comb unneback 4862d 05h /versatile_library/trunk/rtl/verilog/versatile_library.v
80 avalon read write unneback 4865d 01h /versatile_library/trunk/rtl/verilog/versatile_library.v
79 avalon read write unneback 4865d 01h /versatile_library/trunk/rtl/verilog/versatile_library.v
78 default to length = 1 unneback 4865d 02h /versatile_library/trunk/rtl/verilog/versatile_library.v
77 bridge update unneback 4865d 03h /versatile_library/trunk/rtl/verilog/versatile_library.v

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