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[/] [versatile_library/] [trunk/] [rtl/] [verilog/] [versatile_library_actel.v] - Rev 140

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Rev Log message Author Age Path
117 memory init file in shadow ram unneback 3897d 05h /versatile_library/trunk/rtl/verilog/versatile_library_actel.v
116 syncronizer clock unneback 3897d 05h /versatile_library/trunk/rtl/verilog/versatile_library_actel.v
111 memory init parameter for dpram_be unneback 3897d 05h /versatile_library/trunk/rtl/verilog/versatile_library_actel.v
110 WB_DPRAM unneback 3898d 00h /versatile_library/trunk/rtl/verilog/versatile_library_actel.v
109 WB_DPRAM unneback 3898d 00h /versatile_library/trunk/rtl/verilog/versatile_library_actel.v
107 WB_DPRAM unneback 3898d 01h /versatile_library/trunk/rtl/verilog/versatile_library_actel.v
106 WB_DPRAM unneback 3898d 01h /versatile_library/trunk/rtl/verilog/versatile_library_actel.v
105 wb stall in arbiter unneback 3903d 03h /versatile_library/trunk/rtl/verilog/versatile_library_actel.v
103 work in progress unneback 3904d 19h /versatile_library/trunk/rtl/verilog/versatile_library_actel.v
101 generic WB memories, cache updates unneback 3906d 01h /versatile_library/trunk/rtl/verilog/versatile_library_actel.v

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