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[/] [versatile_library/] [trunk/] [rtl/] [verilog/] [versatile_library_altera.v] - Rev 31

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Rev Log message Author Age Path
31 sync FIFO updated unneback 3958d 21h /versatile_library/trunk/rtl/verilog/versatile_library_altera.v
30 updated counter for level1 and level2 function unneback 3958d 21h /versatile_library/trunk/rtl/verilog/versatile_library_altera.v
29 updated counter for level1 and level2 function unneback 3958d 21h /versatile_library/trunk/rtl/verilog/versatile_library_altera.v
28 added sync simplex FIFO unneback 3959d 23h /versatile_library/trunk/rtl/verilog/versatile_library_altera.v
27 added sync simplex FIFO unneback 3959d 23h /versatile_library/trunk/rtl/verilog/versatile_library_altera.v
25 added sync FIFO unneback 3960d 13h /versatile_library/trunk/rtl/verilog/versatile_library_altera.v
24 added vl_dff_ce_set unneback 3961d 21h /versatile_library/trunk/rtl/verilog/versatile_library_altera.v
23 fixed port map error in async fifo 1r1w unneback 3962d 12h /versatile_library/trunk/rtl/verilog/versatile_library_altera.v
22 added binary counters unneback 3962d 17h /versatile_library/trunk/rtl/verilog/versatile_library_altera.v
21 reg -> wire in and or mux in logic unneback 3963d 13h /versatile_library/trunk/rtl/verilog/versatile_library_altera.v
18 naming convention vl_ unneback 3965d 00h /versatile_library/trunk/rtl/verilog/versatile_library_altera.v
17 unneback 4028d 14h /versatile_library/trunk/rtl/verilog/versatile_library_altera.v
15 added delay line unneback 4034d 21h /versatile_library/trunk/rtl/verilog/versatile_library_altera.v
14 reg -> wire for various signals unneback 4035d 03h /versatile_library/trunk/rtl/verilog/versatile_library_altera.v
13 cosmetic update unneback 4035d 04h /versatile_library/trunk/rtl/verilog/versatile_library_altera.v
12 added wishbone comliant modules unneback 4036d 00h /versatile_library/trunk/rtl/verilog/versatile_library_altera.v
11 async fifo simplex unneback 4036d 15h /versatile_library/trunk/rtl/verilog/versatile_library_altera.v
10 added dff_ce_clear unneback 4038d 14h /versatile_library/trunk/rtl/verilog/versatile_library_altera.v
8 added dff_ce_clear unneback 4038d 14h /versatile_library/trunk/rtl/verilog/versatile_library_altera.v
7 mem update unneback 4038d 15h /versatile_library/trunk/rtl/verilog/versatile_library_altera.v

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