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[/] [versatile_library/] [trunk/] [rtl/] [verilog/] [wb.v] - Rev 42

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42 updated mux_andor unneback 4914d 02h /versatile_library/trunk/rtl/verilog/wb.v
40 new build environment with custom.v added as a result file unneback 4914d 03h /versatile_library/trunk/rtl/verilog/wb.v
39 added simple port prio based wb arbiter unneback 4915d 00h /versatile_library/trunk/rtl/verilog/wb.v
33 updated wb3wb3_bridge unneback 4935d 19h /versatile_library/trunk/rtl/verilog/wb.v
32 added vl_pll for ALTERA (cycloneIII) unneback 4943d 04h /versatile_library/trunk/rtl/verilog/wb.v
18 naming convention vl_ unneback 4969d 03h /versatile_library/trunk/rtl/verilog/wb.v
17 unneback 5032d 17h /versatile_library/trunk/rtl/verilog/wb.v
14 reg -> wire for various signals unneback 5039d 05h /versatile_library/trunk/rtl/verilog/wb.v
13 cosmetic update unneback 5039d 07h /versatile_library/trunk/rtl/verilog/wb.v
12 added wishbone comliant modules unneback 5040d 03h /versatile_library/trunk/rtl/verilog/wb.v

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