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[/] [versatile_library/] [trunk/] [rtl] - Rev 42

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Rev Log message Author Age Path
42 updated mux_andor unneback 4854d 03h /versatile_library/trunk/rtl
41 typo in registers.v unneback 4854d 04h /versatile_library/trunk/rtl
40 new build environment with custom.v added as a result file unneback 4854d 05h /versatile_library/trunk/rtl
39 added simple port prio based wb arbiter unneback 4855d 02h /versatile_library/trunk/rtl
38 updated andor mux unneback 4855d 02h /versatile_library/trunk/rtl
37 corrected polynom with length 20 unneback 4860d 22h /versatile_library/trunk/rtl
36 added generic andor_mux unneback 4862d 07h /versatile_library/trunk/rtl
35 added vl_mux2_andor and vl_mux3_andor localparam unneback 4862d 18h /versatile_library/trunk/rtl
34 added vl_mux2_andor and vl_mux3_andor unneback 4862d 18h /versatile_library/trunk/rtl
33 updated wb3wb3_bridge unneback 4875d 20h /versatile_library/trunk/rtl
32 added vl_pll for ALTERA (cycloneIII) unneback 4883d 06h /versatile_library/trunk/rtl
31 sync FIFO updated unneback 4903d 01h /versatile_library/trunk/rtl
30 updated counter for level1 and level2 function unneback 4903d 01h /versatile_library/trunk/rtl
29 updated counter for level1 and level2 function unneback 4903d 01h /versatile_library/trunk/rtl
28 added sync simplex FIFO unneback 4904d 03h /versatile_library/trunk/rtl
27 added sync simplex FIFO unneback 4904d 03h /versatile_library/trunk/rtl
26 typo in sync FIFO, added cnt_lfsr_ce_q cnt_lfsr_ce_clear_q unneback 4904d 04h /versatile_library/trunk/rtl
25 added sync FIFO unneback 4904d 18h /versatile_library/trunk/rtl
24 added vl_dff_ce_set unneback 4906d 01h /versatile_library/trunk/rtl
23 fixed port map error in async fifo 1r1w unneback 4906d 16h /versatile_library/trunk/rtl
22 added binary counters unneback 4906d 21h /versatile_library/trunk/rtl
21 reg -> wire in and or mux in logic unneback 4907d 17h /versatile_library/trunk/rtl
18 naming convention vl_ unneback 4909d 04h /versatile_library/trunk/rtl
17 unneback 4972d 18h /versatile_library/trunk/rtl
15 added delay line unneback 4979d 01h /versatile_library/trunk/rtl
14 reg -> wire for various signals unneback 4979d 07h /versatile_library/trunk/rtl
13 cosmetic update unneback 4979d 08h /versatile_library/trunk/rtl
12 added wishbone comliant modules unneback 4980d 04h /versatile_library/trunk/rtl
11 async fifo simplex unneback 4980d 19h /versatile_library/trunk/rtl
10 added dff_ce_clear unneback 4982d 18h /versatile_library/trunk/rtl

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