URL https://opencores.org/ocsvn/versatile_library/versatile_library/trunk

Subversion Repositories versatile_library

[/] - Rev 60

Rev	Log message	Author	Age	Path
60	added wb b3 byte enable memory, added test in makefile through icarus, typo in latch fixed	unneback	4682d 17h	/
59	added WB RAM B3 with byte enable	unneback	4683d 17h	/
58	corrected EXT unit, rewrite of FF1, FL1	unneback	4700d 00h	/
57	corrected EXT unit, rewrite of FF1, FL1	unneback	4700d 00h	/
56	WB B4 RAM we fix	unneback	4712d 16h	/
55	added WB_B4RAM with byte enable	unneback	4714d 23h	/
54	added WB_B4RAM with byte enable	unneback	4714d 23h	/
53	added WB_B4RAM with byte enable	unneback	4714d 23h	/
52	added WB_B4RAM with byte enable	unneback	4714d 23h	/
51	added WB_B4RAM with byte enable	unneback	4714d 23h	/
50	added WB_B4RAM with byte enable	unneback	4714d 23h	/
49	added WB_B4RAM with byte enable	unneback	4715d 00h	/
48	wb updated	unneback	4721d 17h	/
47	added help program for LFSR counters	unneback	4816d 20h	/
46	updated parity	unneback	4817d 22h	/
45	updated timing in io models	unneback	4819d 16h	/
44	added target independet IO functionns	unneback	4822d 16h	/
43	added logic for parity generation and check	unneback	4826d 19h	/
42	updated mux_andor	unneback	4830d 19h	/
41	typo in registers.v	unneback	4830d 21h	/