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Subversion Repositories versatile_mem_ctrl

[/] [versatile_mem_ctrl/] [tags/] [Rev2] - Rev 109

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Rev Log message Author Age Path
109 Rev2 from trunk unneback 4675d 05h /versatile_mem_ctrl/tags/Rev2
108 updated documentation unneback 4675d 05h /versatile_mem_ctrl/trunk
107 corrected signal type for ba unneback 4831d 09h /versatile_mem_ctrl/trunk
106 added texinfo User guide and updated fsm unneback 4848d 21h /versatile_mem_ctrl/trunk
105 versatile_mem modules naming unneback 4856d 03h /versatile_mem_ctrl/trunk
104 versatile_mem modules naming unneback 4856d 03h /versatile_mem_ctrl/trunk
103 added new block diagram pictures and texi source unneback 4884d 21h /versatile_mem_ctrl/trunk
102 cleaning up unneback 4887d 03h /versatile_mem_ctrl/trunk
101 cleaning up unneback 4887d 03h /versatile_mem_ctrl/trunk
100 unneback 4887d 04h /versatile_mem_ctrl/trunk
99 updated stimuli with automatic check unneback 4887d 04h /versatile_mem_ctrl/trunk
98 updates unneback 4990d 08h /versatile_mem_ctrl/trunk
97 updated tb and sdram16 unneback 4990d 21h /versatile_mem_ctrl/trunk
96 doc update unneback 5021d 09h /versatile_mem_ctrl/trunk
95 new files unneback 5025d 22h /versatile_mem_ctrl/trunk
94 new TB unneback 5034d 06h /versatile_mem_ctrl/trunk
86 mikaeljf 5097d 11h /versatile_mem_ctrl/trunk
85 Added a versatile_mem_ctrl specific version of the flag generation module in the versatile fifo. mikaeljf 5098d 11h /versatile_mem_ctrl/trunk
84 mikaeljf 5102d 10h /versatile_mem_ctrl/trunk
83 mikaeljf 5103d 05h /versatile_mem_ctrl/trunk
82 mikaeljf 5103d 09h /versatile_mem_ctrl/trunk
81 mikaeljf 5104d 06h /versatile_mem_ctrl/trunk
80 mikaeljf 5104d 07h /versatile_mem_ctrl/trunk
79 Added defines that fix bugs with slow wishbone clocks doing burst writes julius 5141d 21h /versatile_mem_ctrl/trunk
78 Burst writing working again, although its mostly hardcoded to burst 4. Also added a fix for when the RAM and bus clocks are about the same speed, to avoid buffer overrun julius 5144d 04h /versatile_mem_ctrl/trunk
77 SDR 16 registering of current_fifo_empty signal in top, appropriate control alterations in fsm_sdr_16 julius 5152d 02h /versatile_mem_ctrl/trunk
76 Changed SDR16 synthesis useioff location, fsm_wb acking logic, default SDR build is for 16m part now julius 5157d 03h /versatile_mem_ctrl/trunk
75 mikaeljf 5157d 04h /versatile_mem_ctrl/trunk
74 Minor update of rtl Makefile. mikaeljf 5161d 03h /versatile_mem_ctrl/trunk
73 Minor updates to fix lost revisions 69 and 70. mikaeljf 5161d 04h /versatile_mem_ctrl/trunk

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