OpenCores
URL https://opencores.org/ocsvn/versatile_mem_ctrl/versatile_mem_ctrl/trunk

Subversion Repositories versatile_mem_ctrl

[/] [versatile_mem_ctrl/] [trunk/] - Rev 98

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
98 updates unneback 4979d 08h /versatile_mem_ctrl/trunk/
97 updated tb and sdram16 unneback 4979d 22h /versatile_mem_ctrl/trunk/
96 doc update unneback 5010d 09h /versatile_mem_ctrl/trunk/
95 new files unneback 5014d 22h /versatile_mem_ctrl/trunk/
94 new TB unneback 5023d 06h /versatile_mem_ctrl/trunk/
86 mikaeljf 5086d 11h /versatile_mem_ctrl/trunk/
85 Added a versatile_mem_ctrl specific version of the flag generation module in the versatile fifo. mikaeljf 5087d 11h /versatile_mem_ctrl/trunk/
84 mikaeljf 5091d 10h /versatile_mem_ctrl/trunk/
83 mikaeljf 5092d 05h /versatile_mem_ctrl/trunk/
82 mikaeljf 5092d 09h /versatile_mem_ctrl/trunk/
81 mikaeljf 5093d 06h /versatile_mem_ctrl/trunk/
80 mikaeljf 5093d 07h /versatile_mem_ctrl/trunk/
79 Added defines that fix bugs with slow wishbone clocks doing burst writes julius 5130d 21h /versatile_mem_ctrl/trunk/
78 Burst writing working again, although its mostly hardcoded to burst 4. Also added a fix for when the RAM and bus clocks are about the same speed, to avoid buffer overrun julius 5133d 04h /versatile_mem_ctrl/trunk/
77 SDR 16 registering of current_fifo_empty signal in top, appropriate control alterations in fsm_sdr_16 julius 5141d 02h /versatile_mem_ctrl/trunk/
76 Changed SDR16 synthesis useioff location, fsm_wb acking logic, default SDR build is for 16m part now julius 5146d 03h /versatile_mem_ctrl/trunk/
75 mikaeljf 5146d 04h /versatile_mem_ctrl/trunk/
74 Minor update of rtl Makefile. mikaeljf 5150d 03h /versatile_mem_ctrl/trunk/
73 Minor updates to fix lost revisions 69 and 70. mikaeljf 5150d 04h /versatile_mem_ctrl/trunk/
72 Restored lost revisions 69 and 70. mikaeljf 5150d 05h /versatile_mem_ctrl/trunk/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.