OpenCores
URL https://opencores.org/ocsvn/wb_lpc/wb_lpc/trunk

Subversion Repositories wb_lpc

[/] [wb_lpc/] [trunk/] [rtl/] [verilog/] [wb_regfile.v] - Rev 20

Rev

Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
20 New directory structure. root 5528d 00h /wb_lpc/trunk/rtl/verilog/wb_regfile.v
17 Fix bugs:
25-Jul-2008 LPC firmware writes must not insert wait-states.
22-Jul-2008 LPC DMA does not report READY+MORE for multi-byte transfers

Add feature:
23-Jul-2008 propagate Wishbone errors across LPC interface

Improve Testbench:
Ability to test multiple wait-states on LPC Peripheral Wishbone Master interface.
Check wbs_err_o from LPC Host.

Rebuild examples with the fixes above.
hharte 5754d 15h /wb_lpc/trunk/rtl/verilog/wb_regfile.v
6 Clean up whitespace. hharte 5898d 05h /wb_lpc/trunk/rtl/verilog/wb_regfile.v
3 Initial checkin of source files hharte 5900d 14h /wb_lpc/trunk/rtl/verilog/wb_regfile.v

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.