URL https://opencores.org/ocsvn/wbuart32/wbuart32/trunk

Subversion Repositories wbuart32

[/] [wbuart32/] [trunk/] [bench/] [cpp/] [uartsim.cpp] - Rev 26

Rev	Log message	Author	Age	Path
26	Formally verified the TXUART core (plus others)	dgisselq	1876d 03h	/wbuart32/trunk/bench/cpp/uartsim.cpp
23	Brought SVN repo up to date with github repo	dgisselq	2077d 13h	/wbuart32/trunk/bench/cpp/uartsim.cpp
18	Lots of updates. See the git log for details	dgisselq	2364d 07h	/wbuart32/trunk/bench/cpp/uartsim.cpp
11	Modified mkspeech to create both hex and include files, to tailor for the broken ISE program.	dgisselq	2632d 12h	/wbuart32/trunk/bench/cpp/uartsim.cpp
3	This fixes a bug in the UARTSIM module whereby the number of counts per baud wasn't equal to the number given in the setup. The previous version worked for count numbers greater than 25 (where I had tested it), but not for low count numbers like 4. This version has now been tested, and is known to work with baud counts as low as 4.	dgisselq	2806d 19h	/wbuart32/trunk/bench/cpp/uartsim.cpp
2	A first version to be checked in. The rxuart.v and txuart.v files have been well tested elsewhere, although the test setup here has not been as well tested. Still, type 'make test' in the base directory and you will get an assurance that the entire thing works--if you would like.	dgisselq	2810d 13h	/wbuart32/trunk/bench/cpp/uartsim.cpp