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[/] [xulalx25soc/] [trunk/] - Rev 21

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21 Files, not links, to replace what were once broken links in this project. dgisselq 3052d 11h /xulalx25soc/trunk/
20 Documents, borrowed from their source projects, and reproduced here. These
describe the various components of the board.		 dgisselq 3052d 11h /xulalx25soc/trunk/
19 Step one in fixing soft link poblems. The following files were soft links,
and not brought into the svn repository properly. They'll be replaced in the
next update with their full sources.		 dgisselq 3052d 11h /xulalx25soc/trunk/
18 Got the bitfile back up to speed at 80 MHz. dgisselq 3056d 02h /xulalx25soc/trunk/
17 Some basic updates, to include adding in a missing file (zipstate). Most of
these updates include making sure that the XuLA2 device can be accessed via
the USB. (Prior versions accessed the FPGA via serial port or network ...)		 dgisselq 3056d 02h /xulalx25soc/trunk/
16 Updates to allow a test of the ICAP configuration interface. dgisselq 3056d 02h /xulalx25soc/trunk/
15 WORKING VERSION! ... or, at least the memory test works. dgisselq 3057d 21h /xulalx25soc/trunk/
14 Quick bug fix. dgisselq 3057d 22h /xulalx25soc/trunk/
13 This version is now working. (It probably would've worked before, but
everything is now working.)		 dgisselq 3057d 22h /xulalx25soc/trunk/
12 Modified to match the settings I'm now using within ISE. dgisselq 3058d 00h /xulalx25soc/trunk/
11 Getting software up and running on the board for the first time. (Not there
yet, but I think these items have now proven themselves.)		 dgisselq 3058d 00h /xulalx25soc/trunk/
10 Changed the name of the memtest.s file. dgisselq 3058d 00h /xulalx25soc/trunk/
9 Bug fixes, optimizations, etc. as part of building for an actual hardware
implementation. Most notably, the speed was lowered from 80MHz down to
76 MHz.		 dgisselq 3058d 00h /xulalx25soc/trunk/
8 Added an interface description to the comments at the top of the file. dgisselq 3060d 10h /xulalx25soc/trunk/
7 Mostly minor changes. Fixed the legal copyright statement in the UART files,
adjusted some comments, and made sure that the zipdbg program contained all
the latest features from our Vault.		 dgisselq 3060d 10h /xulalx25soc/trunk/
6 Initial file load, likely to be buggy, but the initial load nonetheless. dgisselq 3060d 20h /xulalx25soc/trunk/
5 Initial software version, in support of the project. At this point, they are
provided with no guarantees that they work. (They did use to work--on an older
build, but I haven't been able to verify that they work with this newer build
yet.)		 dgisselq 3060d 20h /xulalx25soc/trunk/
4 Here's an initial, albeit incomplete, build. dgisselq 3060d 21h /xulalx25soc/trunk/
3 dgisselq 3060d 21h /xulalx25soc/trunk/
2 A very first, albeit incomplete, build. dgisselq 3060d 21h /xulalx25soc/trunk/

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