URL https://opencores.org/ocsvn/xulalx25soc/xulalx25soc/trunk

Subversion Repositories xulalx25soc

[/] [xulalx25soc/] [trunk/] [rtl/] - Rev 21

Rev	Log message	Author	Age	Path
21	Files, not links, to replace what were once broken links in this project.	dgisselq	3052d 12h	/xulalx25soc/trunk/rtl/
19	Step one in fixing soft link poblems. The following files were soft links, and not brought into the svn repository properly. They'll be replaced in the next update with their full sources.	dgisselq	3052d 12h	/xulalx25soc/trunk/rtl/
18	Got the bitfile back up to speed at 80 MHz.	dgisselq	3056d 03h	/xulalx25soc/trunk/rtl/
14	Quick bug fix.	dgisselq	3057d 23h	/xulalx25soc/trunk/rtl/
9	Bug fixes, optimizations, etc. as part of building for an actual hardware implementation. Most notably, the speed was lowered from 80MHz down to 76 MHz.	dgisselq	3058d 01h	/xulalx25soc/trunk/rtl/
8	Added an interface description to the comments at the top of the file.	dgisselq	3060d 11h	/xulalx25soc/trunk/rtl/
7	Mostly minor changes. Fixed the legal copyright statement in the UART files, adjusted some comments, and made sure that the zipdbg program contained all the latest features from our Vault.	dgisselq	3060d 11h	/xulalx25soc/trunk/rtl/
6	Initial file load, likely to be buggy, but the initial load nonetheless.	dgisselq	3060d 21h	/xulalx25soc/trunk/rtl/
3		dgisselq	3060d 22h	/xulalx25soc/trunk/rtl/
2	A very first, albeit incomplete, build.	dgisselq	3060d 22h	/xulalx25soc/trunk/rtl/