URL https://opencores.org/ocsvn/xulalx25soc/xulalx25soc/trunk

Subversion Repositories xulalx25soc

[/] [xulalx25soc/] [trunk/] [rtl/] [Makefile] - Rev 117

Rev	Log message	Author	Age	Path
117	Updates, to include new README and bench/cpp/Makefile that doesnt depend upon a static VERILATOR_ROOT location.	dgisselq	2770d 11h	/xulalx25soc/trunk/rtl/Makefile
114	Added ZipBones to the list of dependencies, so this will (should) build properly for the XULA9 as well as the XULA25.	dgisselq	2863d 13h	/xulalx25soc/trunk/rtl/Makefile
113	Lots of updates, mostly focused on getting the XuLA board and CPU able to pass a comprehensive test suite. At this point, everything passes and logic usage is down even. Among the few changes includes the "break" bit in the uCC register, used to indicate a switch to supervisor mode occurred as a result of a user break, and the ability for the supervisor to clear the instruction cache.	dgisselq	2863d 13h	/xulalx25soc/trunk/rtl/Makefile
74	Adds the SD-card capability, and connects the debug wires to/from the uartdev in case it needs to be debugged.	dgisselq	2901d 08h	/xulalx25soc/trunk/rtl/Makefile
7	Mostly minor changes. Fixed the legal copyright statement in the UART files, adjusted some comments, and made sure that the zipdbg program contained all the latest features from our Vault.	dgisselq	3061d 20h	/xulalx25soc/trunk/rtl/Makefile
3		dgisselq	3062d 06h	/xulalx25soc/trunk/rtl/Makefile
2	A very first, albeit incomplete, build.	dgisselq	3062d 06h	/xulalx25soc/trunk/rtl/Makefile