URL https://opencores.org/ocsvn/xulalx25soc/xulalx25soc/trunk

Subversion Repositories xulalx25soc

[/] [xulalx25soc/] [trunk/] [rtl/] [cpu/] [wbdmac.v] - Rev 118

Rev	Log message	Author	Age	Path
118	Lots of changes. The biggest are to the CPU: MPYxHI instructions are now verified to be working, ILLegal instructions stop at the right location, the STEP bit no longer self-clears, etc. Other changes cleaned up the internal documentation and removed parameters that should only have local scope from the global parameter list. The NEW_INSTRUCTION_SET was also removed from the CPU, since ... it's been new for too long to really be new anymore.	dgisselq	2743d 19h	/xulalx25soc/trunk/rtl/cpu/wbdmac.v
117	Updates, to include new README and bench/cpp/Makefile that doesnt depend upon a static VERILATOR_ROOT location.	dgisselq	2768d 10h	/xulalx25soc/trunk/rtl/cpu/wbdmac.v
69	Massive logic simplification. This is also the first (verified) working version.	dgisselq	2899d 07h	/xulalx25soc/trunk/rtl/cpu/wbdmac.v
52	This brings the XuLA2-LX25 SoC up to speed with the rest of the ZipCPU, and prepares it for the 32x32 bit multiply instruction set change.	dgisselq	2947d 07h	/xulalx25soc/trunk/rtl/cpu/wbdmac.v
45	Minor cosmetic change, eliminates a warning in Xilinx's XISE but offers no functional difference.	dgisselq	2981d 06h	/xulalx25soc/trunk/rtl/cpu/wbdmac.v
21	Files, not links, to replace what were once broken links in this project.	dgisselq	3051d 19h	/xulalx25soc/trunk/rtl/cpu/wbdmac.v