URL https://opencores.org/ocsvn/xulalx25soc/xulalx25soc/trunk

Subversion Repositories xulalx25soc

[/] [xulalx25soc/] [trunk/] [rtl/] [uartdev.v] - Rev 113

Rev	Log message	Author	Age	Path
113	Lots of updates, mostly focused on getting the XuLA board and CPU able to pass a comprehensive test suite. At this point, everything passes and logic usage is down even. Among the few changes includes the "break" bit in the uCC register, used to indicate a switch to supervisor mode occurred as a result of a user break, and the ability for the supervisor to clear the instruction cache.	dgisselq	2846d 05h	/xulalx25soc/trunk/rtl/uartdev.v
74	Adds the SD-card capability, and connects the debug wires to/from the uartdev in case it needs to be debugged.	dgisselq	2884d 00h	/xulalx25soc/trunk/rtl/uartdev.v
57	Fixed the TX/RX addresses so that they match the documentation: TX first, then RX.	dgisselq	2892d 00h	/xulalx25soc/trunk/rtl/uartdev.v
9	Bug fixes, optimizations, etc. as part of building for an actual hardware implementation. Most notably, the speed was lowered from 80MHz down to 76 MHz.	dgisselq	3042d 01h	/xulalx25soc/trunk/rtl/uartdev.v
7	Mostly minor changes. Fixed the legal copyright statement in the UART files, adjusted some comments, and made sure that the zipdbg program contained all the latest features from our Vault.	dgisselq	3044d 12h	/xulalx25soc/trunk/rtl/uartdev.v
2	A very first, albeit incomplete, build.	dgisselq	3044d 22h	/xulalx25soc/trunk/rtl/uartdev.v