URL https://opencores.org/ocsvn/xulalx25soc/xulalx25soc/trunk

Subversion Repositories xulalx25soc

[/] [xulalx25soc/] [trunk/] [rtl/] [wbubus.v] - Rev 102

Rev	Log message	Author	Age	Path
102	Updated documentation. The documentation for these now also reflects that these were drawn from an FPGA Library project, that is shared among many FPGA builds.	dgisselq	2861d 21h	/xulalx25soc/trunk/rtl/wbubus.v
46	This is a bug fix release--fixing the bug that kept dumpsdram.cpp/wbsdram.v from working when long pipelined reads were interrupted by the necessity of a pair of refresh cycles.	dgisselq	2969d 01h	/xulalx25soc/trunk/rtl/wbubus.v
43	Commentary changes only, no substance.	dgisselq	2972d 21h	/xulalx25soc/trunk/rtl/wbubus.v
9	Bug fixes, optimizations, etc. as part of building for an actual hardware implementation. Most notably, the speed was lowered from 80MHz down to 76 MHz.	dgisselq	3048d 23h	/xulalx25soc/trunk/rtl/wbubus.v
2	A very first, albeit incomplete, build.	dgisselq	3051d 20h	/xulalx25soc/trunk/rtl/wbubus.v