URL https://opencores.org/ocsvn/xulalx25soc/xulalx25soc/trunk

Subversion Repositories xulalx25soc

[/] - Rev 14

Rev	Log message	Author	Age	Path
14	Quick bug fix.	dgisselq	3059d 15h	/
13	This version is now working. (It probably would've worked before, but everything is now working.)	dgisselq	3059d 15h	/
12	Modified to match the settings I'm now using within ISE.	dgisselq	3059d 18h	/
11	Getting software up and running on the board for the first time. (Not there yet, but I think these items have now proven themselves.)	dgisselq	3059d 18h	/
10	Changed the name of the memtest.s file.	dgisselq	3059d 18h	/
9	Bug fixes, optimizations, etc. as part of building for an actual hardware implementation. Most notably, the speed was lowered from 80MHz down to 76 MHz.	dgisselq	3059d 18h	/
8	Added an interface description to the comments at the top of the file.	dgisselq	3062d 03h	/
7	Mostly minor changes. Fixed the legal copyright statement in the UART files, adjusted some comments, and made sure that the zipdbg program contained all the latest features from our Vault.	dgisselq	3062d 04h	/
6	Initial file load, likely to be buggy, but the initial load nonetheless.	dgisselq	3062d 14h	/
5	Initial software version, in support of the project. At this point, they are provided with no guarantees that they work. (They did use to work--on an older build, but I haven't been able to verify that they work with this newer build yet.)	dgisselq	3062d 14h	/
4	Here's an initial, albeit incomplete, build.	dgisselq	3062d 15h	/
3		dgisselq	3062d 15h	/
2	A very first, albeit incomplete, build.	dgisselq	3062d 15h	/
1	The project and the structure was created	root	3062d 16h	/