OpenCores
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Rev Log message Author Age Path
48 Updated readme Revanth 976d 18h /zap
47 added license to readme Revanth 977d 19h /zap
46 removed tbd code Revanth 979d 20h /zap
45 updated readme Revanth 979d 21h /zap
44 Revanth 979d 21h /zap
43 Updated to v5T Revanth 979d 22h /zap
42 Readme Revanth 2174d 18h /zap
41 Comments Revanth 2174d 18h /zap
40 Updated doc Revanth 2174d 18h /zap
39 Fixed BP bug Revanth 2174d 18h /zap
38 Revanth 2175d 18h /zap
37 Revanth 2177d 19h /zap
36 Added comments in testbench. Revanth 2184d 08h /zap
35 Added uart_tx Revanth 2184d 18h /zap
34 Added simple Thumb TC. Updated docs Revanth 2184d 18h /zap
33 Updated config and TC description. Revanth 2185d 06h /zap
32 Added documentation, makefile updates Revanth 2185d 18h /zap
31 Fixed large page AP sel Revanth 2186d 03h /zap
30 Added comments Revanth 2187d 15h /zap
29 Added timer and VIC in TB. Revanth 2187d 16h /zap
28 Minor updates Revanth 2191d 06h /zap
27 Added checks for XTerm and iverilog Revanth 2192d 17h /zap
26 Revanth 2192d 18h /zap
25 sync to git Revanth 2540d 07h /zap
24 sync to github Revanth 2543d 07h /zap
23 sync to git Revanth 2550d 17h /zap
22 update cp15 fields Revanth 2552d 16h /zap
21 major update Revanth 2552d 17h /zap
20 latest ver Revanth 2556d 14h /zap
19 update Revanth 2559d 09h /zap

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