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URL https://opencores.org/ocsvn/zet86/zet86/trunk

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[/] [zet86/] [trunk/] [cores/] [zet/] - Rev 55

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Rev Log message Author Age Path
55 Directory restructuration zeus 5487d 16h /zet86/trunk/cores/zet/
53 Wishbone's ack now is 1 cycle to make it 100% wb compatible zeus 5532d 02h /zet/
52 * Zet working at 25 Mhz without any visible problems...
* Implemented a simple PIC and Timer to receive both IRQ0 and IRQ1
* Hard disk implementation:
* Compact Flash controller through sysace (thanks to Sébastien
Bourdeauducq)
* int13_harddisk() function with read/write support
* int 19h implemented for hard disk
* Fetch simplification for NOP instruction
* Simulation model for the multiplier
zeus 5536d 01h /zet/
49 New directory structure. root 5538d 10h /zet/
46 int13 speedup (now it boots 50% faster) zeus 5545d 04h /zet/
45 Major flaws corrected:
* XCHG and SAHF microcode corrections
* Synchronized 'inta' signal with interrupt flag and 'intr'
* BIOS pusha 8086 transformation correction
* Decoder corrected for: CMP, ADD, ADC, SUB, SBB, XOR, AND, OR with i
* Implemented functions 08, 09 and 0a of int 10h
* Keyboard BIOS interrupts int 16h and int 09h now working

1st version instr trace
zeus 5546d 20h /zet/
44 Hardware debugger with memory dump support zeus 5557d 02h /zet/
43 Wishbone compatible 8042 keyboard controller zeus 5570d 17h /zet/
42 External interrupts support zeus 5581d 18h /zet/
41 VGA status register and more VGA BIOS code zeus 5594d 12h /zet/
40 Decoder simplified and VDU corrected zeus 5596d 17h /zet/
39 Synchronized with git master - Big cleanup zeus 5654d 17h /zet/
37 BIOS booting zeus 5679d 20h /zet/
35 Full Wishbone master compliant zeus 5683d 19h /zet/
32 Segment override prefix done zeus 5688d 06h /zet/
31 Instruction AAM done zeus 5689d 06h /zet/
30 DIV/IDIV instructions zeus 5689d 17h /zet/
29 MUL/MULI/AAD instructions zeus 5693d 21h /zet/
28 CMP/NEG completed zeus 5694d 18h /zet/
27 ADD/SUB instructions zeus 5694d 22h /zet/

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