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URL https://opencores.org/ocsvn/zet86/zet86/trunk

Subversion Repositories zet86

[/] [zet86/] [trunk/] [sim/] - Rev 52

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Rev Log message Author Age Path
52 * Zet working at 25 Mhz without any visible problems...
* Implemented a simple PIC and Timer to receive both IRQ0 and IRQ1
* Hard disk implementation:
* Compact Flash controller through sysace (thanks to Sébastien
Bourdeauducq)
* int13_harddisk() function with read/write support
* int 19h implemented for hard disk
* Fetch simplification for NOP instruction
* Simulation model for the multiplier
zeus 5524d 05h /zet86/trunk/sim/
49 New directory structure. root 5526d 14h /zet86/trunk/sim/
42 External interrupts support zeus 5569d 22h /trunk/sim/
39 Synchronized with git master - Big cleanup zeus 5642d 21h /trunk/sim/
35 Full Wishbone master compliant zeus 5671d 23h /trunk/sim/
30 DIV/IDIV instructions zeus 5677d 21h /trunk/sim/
29 MUL/MULI/AAD instructions zeus 5682d 01h /trunk/sim/
28 CMP/NEG completed zeus 5682d 21h /trunk/sim/
27 ADD/SUB instructions zeus 5683d 01h /trunk/sim/
26 New BIOS version and Conversion instructions zeus 5686d 22h /trunk/sim/
24 Rotate insructions support zeus 5688d 23h /trunk/sim/
22 Shift instructions tested zeus 5692d 22h /trunk/sim/
21 Shifts test case zeus 5693d 22h /trunk/sim/
19 Bitwise operators test bench zeus 5703d 22h /trunk/sim/
15 00, 01, 02, 03, 04, 05, 06, 07 and 09 test benches correctly passed zeus 5710d 00h /trunk/sim/
14 JMP and MOV tests passed zeus 5710d 23h /trunk/sim/
2 Initial import zeus 5776d 16h /trunk/sim/

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