OpenCores
URL https://opencores.org/ocsvn/zipcpu/zipcpu/trunk

Subversion Repositories zipcpu

[/] - Rev 184

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
164 Updated with inputs from Hellwig Geisse regarding the details of the ECO32
CPU.
dgisselq 2848d 10h /
163 Trimmed OR1K instruction set down from 219 instructions, to the minimum number
of 48. Thanks to Olof for helping identify the minimal set!
dgisselq 2856d 12h /
162 Noted 64-bit integers are by extension, as are vector instructions. dgisselq 2856d 12h /
161 Initial version of the ORConf slides, showing only the initial CPU survey. dgisselq 2856d 13h /
160 Logic updates, and bug fix corrections to bring this in line with the current
XuLA2-LX25 SoC version. (i.e., the XuLA version was debugged and improved,
this update pushes those improvements to the mainline.)
dgisselq 2872d 00h /
159 Now supports building a simulator that can load ELF files, such as GCC and/or
binutils will produce.
dgisselq 2872d 00h /
158 Now automatically builds the toolchain by default. dgisselq 2872d 00h /
157 Added the divide unit to the list of ZipCPU dependencies. dgisselq 2872d 00h /
156 Fixed a compiler warning for an unused result. dgisselq 2872d 00h /
155 Improved debug trace quality, for finding bugs after the fact. dgisselq 2872d 00h /

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.