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24 Lots more changes to the spec. It's still not done, but it is more complete
than before.		 dgisselq 3180d 20h /
23 Oops -- left some portions of the RTC Clock spec in with the ZIP CPU spec.
These were quickly removed.		 dgisselq 3182d 16h /
22 dgisselq 3182d 16h /
21 This update adds an incomplete version of the specification for the chip.
I ned to come back to this and do a lot more writing, but it is a start.		 dgisselq 3182d 16h /
20 Added a quick README to the debugger directory. dgisselq 3184d 06h /
19 Here's the outlines of a debugger. dgisselq 3184d 06h /
18 A couple of changes: Registers can now be changed via the debug interface.
Also, in anticipation of being able to interrupt the break the processor,
the CPU now exports an interrupt line to the external environment to tell
when it has been halted. Thus, if it gets halted by a break instruction,
the ZipSystem will interrupt whatever's in its environment so that the
debugger can come and examine its state.

Oh, and one other: because you can't examine the state of the CPU without
halting it, I modified the debug control register to export the four
useful flags: break-enable, interrupts enabled, and sleep (step comes for
free in this implementation).		 dgisselq 3184d 07h /
17 The ZOPCODES function zipi_to_string (ZIP CPU instruction to string, part of
the machine code dump) was adjusted to have closer to a fixed width output.
It no longer uses tab characters, which can have an unreliable effect.		 dgisselq 3184d 07h /
16 The assembler now supports:
1. Multiple data elements on a line. These are lines like:
WORD 5,8,4,1
which place the words 5, 8, 4, and 1 directly into the object code to be
referenced as data. Prior to this release, these lines would assemble
properly but only place '5' as a data element into the object code.

2. The '-E' preprocessor only directive is now supported to produce output
from the preprocessor and see what is (or is not) happening there.

3. The preprocessor now validly places "#line" comments into the file, which
the assembler picks up and uses in it's error codes. These help identify
where errors took place.

4. Zasm now looks for the preprocessor (zpp) in the same directory zasm was
run from, using the same directory prefix as zasm, whenever zasm is given such
a directory prefix.

And ... perhaps other things I've forgotten about.		 dgisselq 3185d 14h /
15 Updated the core CPUOPS module to make certain that the carry was properly
set on right shifts. (Carry is then the last bit shifted out to the right,
and has no relation to the high order bits of the word.) Also fixed a bug
in the busdelay.v file that prevented our Quad SPI flash controller from
working. (This bug fix has not yet been tested ...) Our test.S program, the
closest thing we have to a regression test and found in the sw/zasm directory,
still successfully passes in Verilator.		 dgisselq 3187d 20h /

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