URL https://opencores.org/ocsvn/zipcpu/zipcpu/trunk

Subversion Repositories zipcpu

[/] - Rev 67

Rev	Log message	Author	Age	Path
47	Added some new graphics, includes the file for the Zip Bones system.	dgisselq	3128d 09h	/
46	A series of updates associated with getting Dhrystone to work. Includes updates to getting multiple files to link/work together within the assembler, as well as getting quoted quotations to work in the lexer, and better include file support in the preprocessor.	dgisselq	3128d 09h	/
45	Library routines for 32-bit multiply and divide, both signed and unsigned.	dgisselq	3128d 09h	/
44	??	dgisselq	3128d 09h	/
43	Minor edits to the C++ testbench.	dgisselq	3128d 09h	/
42	Oops -- forgot to add the stack.	dgisselq	3128d 09h	/
41	Assembly file for the Dhrystone benchmark added.	dgisselq	3128d 09h	/
40	Quick update, updates the assembly for the new version of the assembler.	dgisselq	3128d 09h	/
39	Here's the documentation update to support the pipelined read/writes of the bus from the CPU, as well as the test file that proved they worked.	dgisselq	3131d 12h	/
38	A couple of quick updates: - The Zip CPU now supports pipelined memory access at one clock per instruction (assuming all the instructions are in the cache) - There is now a 'zipbones' module to build a Zip System without peripherals. Any peripherals would then need to be external to the CPU. - Some bug fixes. Documentation changes coming shortly.	dgisselq	3131d 14h	/