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[/] [zipcpu/] [trunk/] - Rev 190

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Rev Log message Author Age Path
190 Added the copyright statement back in. dgisselq 1924d 06h /zipcpu/trunk/
189 Final, as delivered, ORCONF slides. dgisselq 1924d 06h /zipcpu/trunk/
188 Adjusted the opcodes to match the binutils port: added RTN instructions, and
allowed BREAK instructions to include an immediate--to be interpreted by the
debugger.
dgisselq 1956d 09h /zipcpu/trunk/
187 Updated to match changed register definitions within the core. dgisselq 1956d 09h /zipcpu/trunk/
186 Now allows profile dumping for ELF executables. dgisselq 1956d 09h /zipcpu/trunk/
185 Now includes the proper flags for building with ELF executable file support. dgisselq 1956d 09h /zipcpu/trunk/
184 Adjusted the illegal instruction option documentation. dgisselq 1956d 09h /zipcpu/trunk/
183 Cleaned up the system so that !CYC implies !STB as well. dgisselq 1956d 09h /zipcpu/trunk/
182 Bug fix for fast memories. This now works for memories with single cycle
latencies.
dgisselq 1956d 09h /zipcpu/trunk/
181 Adjusted the wishbone logic to include our wishbone simplification that if
CYC is ever low, STB must be low as well.
dgisselq 1956d 09h /zipcpu/trunk/
180 Cleaned up the stall logic--made it independent of whether or not we are
designed to be alternating or not.
dgisselq 1956d 09h /zipcpu/trunk/
179 Lots of changes, most (all?) of them to the non-pipelined core. The resulting
core is now about 100-120 LUTs smaller when not-pipelined, and yet maintains
the pipelined logic when necessary.
dgisselq 1956d 09h /zipcpu/trunk/
178 Rewrote the parameter controlled logic to be just that: perameter controller,
rather than depending upon generics. The result reduces our area by a couple
LUTs.
dgisselq 1956d 09h /zipcpu/trunk/
177 Fixed the illegal address logic to be more precise. dgisselq 1956d 09h /zipcpu/trunk/
176 Switched from distributed to block RAM, and adjusted the logic to help
timing closure. The resulting core will build in designs up to 200MHz in
speed.
dgisselq 1956d 09h /zipcpu/trunk/
175 Fixed the carry bit for logical shifts: it is the last bit shifted out of the
register. 0x80000000>>32 yields a 0 with carry set. Anything logically
shifted by a number greater than thirty two clears carry and register.
dgisselq 1956d 09h /zipcpu/trunk/
174 Simplified the divide to improve timing performance. dgisselq 1956d 10h /zipcpu/trunk/
173 Adjusted the pdfinfo field, to accommodate Google's bot. dgisselq 1956d 10h /zipcpu/trunk/
172 Added a test to see if the compiler properly handles a large number of
arguments. Further, the sibcall enabled compiler now correcly makes a
sibcall from the end of txreg().
dgisselq 1956d 10h /zipcpu/trunk/
171 This fixes the problem whereby the ZipCPU didn't properly access more than
5 word-sized function parameters.
dgisselq 1958d 15h /zipcpu/trunk/

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