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[/] [zipcpu/] [trunk/] - Rev 200

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Rev Log message Author Age Path
200 Lots of GCC bugs fixed, some new features added, longs should work now. The
build scripts have also been updated and simplified.
dgisselq 1877d 17h /zipcpu/trunk/
199 Massive specification rewrite, brings it up to date with the current ZipCPU
state. This does not reflect any major change to the CPU.
dgisselq 1903d 06h /zipcpu/trunk/
198 Added a copyright notice. dgisselq 1904d 10h /zipcpu/trunk/
197 Added a new multiply testbench. Other changes were necessary to follow. dgisselq 1904d 10h /zipcpu/trunk/
196 Updated internal documentation. dgisselq 1904d 10h /zipcpu/trunk/
195 Adds a new mode that can handle a delayed stall signal. dgisselq 1904d 10h /zipcpu/trunk/
194 Cleaned up some parameters, trying to create more consistency. dgisselq 1904d 10h /zipcpu/trunk/
193 These changes make it so the ALU multiplies pass a test-bench. dgisselq 1904d 10h /zipcpu/trunk/
192 Fixed a bug with constant alignment in the assembler. dgisselq 1904d 10h /zipcpu/trunk/
191 Updated toolchain, more information on the example debugger. dgisselq 1919d 13h /zipcpu/trunk/
190 Added the copyright statement back in. dgisselq 1921d 05h /zipcpu/trunk/
189 Final, as delivered, ORCONF slides. dgisselq 1921d 05h /zipcpu/trunk/
188 Adjusted the opcodes to match the binutils port: added RTN instructions, and
allowed BREAK instructions to include an immediate--to be interpreted by the
debugger.
dgisselq 1953d 07h /zipcpu/trunk/
187 Updated to match changed register definitions within the core. dgisselq 1953d 08h /zipcpu/trunk/
186 Now allows profile dumping for ELF executables. dgisselq 1953d 08h /zipcpu/trunk/
185 Now includes the proper flags for building with ELF executable file support. dgisselq 1953d 08h /zipcpu/trunk/
184 Adjusted the illegal instruction option documentation. dgisselq 1953d 08h /zipcpu/trunk/
183 Cleaned up the system so that !CYC implies !STB as well. dgisselq 1953d 08h /zipcpu/trunk/
182 Bug fix for fast memories. This now works for memories with single cycle
latencies.
dgisselq 1953d 08h /zipcpu/trunk/
181 Adjusted the wishbone logic to include our wishbone simplification that if
CYC is ever low, STB must be low as well.
dgisselq 1953d 08h /zipcpu/trunk/

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