OpenCores
URL https://opencores.org/ocsvn/zipcpu/zipcpu/trunk

Subversion Repositories zipcpu

[/] [zipcpu/] [trunk/] [bench/] [asm/] - Rev 22

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
12 Bunch of changes while trying to get a hello world program:
1. Right shifts by 32 or more now result in zero, or all of the top bit in the
case of ASRs.
2. zdump now properly includes addresses with dumped lines.
3. zparser now properly handles immediate values via the .DAT instruction.
dgisselq 3200d 02h /zipcpu/trunk/bench/asm/
11 This version works on an FPGA!!!

(Or at least the wdt.S program passes ...)
dgisselq 3200d 10h /zipcpu/trunk/bench/asm/
10 Here's the watchdog timer code, as well as some pictures of the register
set.
dgisselq 3200d 23h /zipcpu/trunk/bench/asm/
2 An initial load. No promises of what works or not, but this is where the
project is at.
dgisselq 3202d 00h /zipcpu/trunk/bench/asm/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.