URL https://opencores.org/ocsvn/zipcpu/zipcpu/trunk

Subversion Repositories zipcpu

[/] [zipcpu/] [trunk/] [bench/] [asm] - Rev 41

Rev	Log message	Author	Age	Path
41	Assembly file for the Dhrystone benchmark added.	dgisselq	3134d 20h	/zipcpu/trunk/bench/asm
40	Quick update, updates the assembly for the new version of the assembler.	dgisselq	3134d 20h	/zipcpu/trunk/bench/asm
36	Lots of changes to increase processing speed and remove pipeline stalls. Removed the useless flash cache, replacing it with a proper DMA controller. "make test" in the main directory now runs a test program in Verilator and reports on the results.	dgisselq	3147d 05h	/zipcpu/trunk/bench/asm
12	Bunch of changes while trying to get a hello world program: 1. Right shifts by 32 or more now result in zero, or all of the top bit in the case of ASRs. 2. zdump now properly includes addresses with dumped lines. 3. zparser now properly handles immediate values via the .DAT instruction.	dgisselq	3200d 22h	/zipcpu/trunk/bench/asm
11	This version works on an FPGA!!! (Or at least the wdt.S program passes ...)	dgisselq	3201d 06h	/zipcpu/trunk/bench/asm
10	Here's the watchdog timer code, as well as some pictures of the register set.	dgisselq	3201d 19h	/zipcpu/trunk/bench/asm
2	An initial load. No promises of what works or not, but this is where the project is at.	dgisselq	3202d 20h	/zipcpu/trunk/bench/asm