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[/] [zipcpu/] [trunk/] [bench/] [cpp] - Rev 204

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Rev	Log message	Author	Age	Path
204	Added the two simulators back into the SVN repository	dgisselq	2611d 08h	/zipcpu/trunk/bench/cpp
202	Additional ZipCPU changes associated w 8b upgrade	dgisselq	2611d 09h	/zipcpu/trunk/bench/cpp
197	Added a new multiply testbench. Other changes were necessary to follow.	dgisselq	2737d 10h	/zipcpu/trunk/bench/cpp
187	Updated to match changed register definitions within the core.	dgisselq	2786d 08h	/zipcpu/trunk/bench/cpp
186	Now allows profile dumping for ELF executables.	dgisselq	2786d 08h	/zipcpu/trunk/bench/cpp
185	Now includes the proper flags for building with ELF executable file support.	dgisselq	2786d 08h	/zipcpu/trunk/bench/cpp
159	Now supports building a simulator that can load ELF files, such as GCC and/or binutils will produce.	dgisselq	2879d 04h	/zipcpu/trunk/bench/cpp
155	Improved debug trace quality, for finding bugs after the fact.	dgisselq	2879d 04h	/zipcpu/trunk/bench/cpp
154	Added timing checks on the busy and valid signals: either one of the two is valid, or the whole is idle.	dgisselq	2879d 04h	/zipcpu/trunk/bench/cpp
149	Updated the Makefile documentation and the all target.	dgisselq	2912d 02h	/zipcpu/trunk/bench/cpp
148	Minor changes to get LONG_MPY working, and adjust the documentation.	dgisselq	2912d 02h	/zipcpu/trunk/bench/cpp
147	Cleans up div_tb a bit, causing it to write SUCCESS out if successful and abort if not.	dgisselq	2912d 02h	/zipcpu/trunk/bench/cpp
140	Minor changes, but fixes build of zippy_tb.cpp.	dgisselq	2915d 16h	/zipcpu/trunk/bench/cpp
134	Working updates, to keep this up to date with the RTL code.	dgisselq	2933d 04h	/zipcpu/trunk/bench/cpp
105	Fixed some nasty early branching bugs. Adjusted the Makefile to declare that cpudefs.h was automatically generated from cpudefs.v, and made sure that zipbones included the cpudefs.v so it could get the DEBUG_SCOPE define. In addition, the test.S was updated to test long jumps, the early branching bug we found, and all three early branching instructions: ADD #x,PC, LOC(PC),PC, and LDI #x,PC.	dgisselq	2976d 13h	/zipcpu/trunk/bench/cpp
87	Adjusted the operator input line to reflect actual logic inputs, rather than the registered inputs which may have been out of date. (Indeed, they were out of date for the bug I was chasing and fixed ...)	dgisselq	3043d 04h	/zipcpu/trunk/bench/cpp
77	First check-in: the test bench for the divide instruction.	dgisselq	3048d 07h	/zipcpu/trunk/bench/cpp
76	The biggest change here was to zippy_tb, to make it more similar to the debugger and to make it work with VLIW-type instructions.	dgisselq	3048d 07h	/zipcpu/trunk/bench/cpp
75	Modified for VLIW instructions.	dgisselq	3048d 07h	/zipcpu/trunk/bench/cpp
69	This implements the "new Instruction Set" architecture for the Zip CPU. It's a massive change set, that touches just about everything but probably not enough of everything. Please see the spec.pdf for a description of this new architecture.	dgisselq	3054d 12h	/zipcpu/trunk/bench/cpp

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[/] [zipcpu/] [trunk/] [bench/] [cpp] - Rev 204

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